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seiko epson corporation 1 pf590-06 E0C6274 4-bit single chip microcomputer wide voltage operation products l core cpu architecture l dual slope type a/d converter l reference voltage generation circuit l general purpose operating amplifier l svd circuit n description the E0C6274 is a single-chip microcomputer made up of the 4-bit core cpu e0c6200a, rom, ram, lcd driver, input ports, output ports, i/o ports, clock timer, stopwatch timer, programmable timer, clock-synchro- nized serial interface, general purpose operational amplifier, dual slope type a/d converter and watchdog timer. because of its low-voltage operation and low power consumption, this series is ideal for a wide range of applica- tions, and is especially suitable for battery-driven systems. n features l cmos lsi 4-bit parallel processing l clock ..................................................... 32.768khz/1mhz (typ.) l instruction set ........................................ 109 instructions l instruction execution time ..................... when operated 32khz : 153sec, 214sec, 366sec when operated 1mhz : 5sec, 7sec, 12sec l rom capacity ....................................... 4,096 words, 12 bits per word l ram capacity ........................................ 512 words, 4 bits per word l a/d converter ........................................ dual slope a/d converter resolution/conversion speed: programmable (need changed external parts) 6400 count: 500ms/3200 count: 250ms 1600 count: 125ms/800 count: 62.5ms a/d conversion accuracy: 0.2% (zone of temperature: 0c to 50c) analog measuring: programmable (voltage/difference voltage/resistor: measuring) analog voltage inputs: 5 channels reference voltage generation circuit middle electric potential (gnd) generation circuit l built-in operational amplifier ................. 2 mos input op-amps l input port ............................................... 5 bits (selected by mask option: with or without pull-up resistor) l output port ............................................ 4 bits (clock output and buzzer output are available by mask option) l built-in stopwatch timer l built-in watchdog timer l i/o port .................................................. 12 bits (combine serial i/o ports clock: changed through software) l serial i/o port ........................................ 1 port (clock synchronous/8 bits) l lcd driver ............................................. either 32 segments 1, 2, 3 or 4 commons (selected through software) regulated voltage circuit and booster voltage circuit built-in (correspond to 3.0v to 4.5v lcd: vr adjustment) l timer ..................................................... time base counter 2ch. programmable timer/event counter (8 bits) 1ch.
2 E0C6274 l supply voltage detective (svd) circuit built-in ......................................... 2.3v/2.4v/2.5v/2.6v programmable (accuracy 100mv) l interrupts ............................................... external : input interrupt 2 lines internal : timer interrupt 3 lines serial i/o interrupt 1 line a/d interrupt 1 line l supply voltage ...................................... operating : 2.4v to 5.5v (single external power supply) no operating : 1.8v to 5.5v (single external power supply) l current consumption ........................... sleep mode : 0.7a (3v, stop oscillation) halt mode : 2.0a (3v, 32khz) operating mode : 6.0a (3v, 32khz) : 200a (3v, 1mhz) (a/d operation) : 306a (3v, 32khz) : 506a (3v, 32khz, operated op-amp) l package ................................................ qfp5-100pin (plastic), qfp15-100pin (plastic) die form n block diagram logic power control and svd interrupt control prog. timer or event counter k00?03 k10 ram 512 x 4 com0? com3 seg0? seg31 dd ca c1 c2 c3 d1 ss p00?03 p10?13 p20?23 system reset control rom 4,096 x 12 core cpu e0c6200a osc and sleep lcd driver 32 x 4 osc1 osc2 osc3 osc4 analog power control dda ra r1 r2 ssa a/d converter ai0 ai1 ai2 ai3 ai4 aif bf ri ci caz co op-amp aip0, 1 aim0, 1 aout0, 1 timer stop watch output port input port i/o port fout & buzzer serial i/o port reset test r00?03 v v v v v ca cb cc v v v v v v ch cl gnd v
3 E0C6274 51 80 31 50 index 30 1 100 81 E0C6274 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 k02 k01 k00 n.c. n.c. v ss osc1 osc2 osc3 osc4 v dd r03 r02 r01 r00 p00 p01 p02 p03 p10 p11 p12 p13 p20 p21 no. pin name 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 p22 p23 reset test cc cb ca v c3 v c2 v c1 v ca com3 com2 com1 com0 seg0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 no. pin name 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 seg10 seg11 seg12 seg13 seg14 seg15 seg16 seg17 seg18 seg19 seg20 seg21 seg22 seg23 seg24 seg25 seg26 seg27 seg28 seg29 seg30 seg31 co aif ai4 n.c. = no connection no. pin name 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ai3 ai2 v ssa ai1 ai0 ci caz bf ri ch cl gnd v dda aout0 aip0 aim0 aip1 aim1 aout1 v r1 v r2 v ra v d1 k10 k03 no. pin name n pin configuration qfp5-100pin 51 75 26 50 index 25 1 100 76 E0C6274 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 k00 n.c. n.c. v ss osc1 osc2 osc3 osc4 v dd r03 r02 r01 r00 p00 p01 p02 p03 p10 p11 p12 p13 p20 p21 p22 p23 no. pin name 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 reset test cc cb ca v c3 v c2 v c1 v ca com3 com2 com1 com0 seg0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 no. pin name 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 seg12 seg13 seg14 seg15 seg16 seg17 seg18 seg19 seg20 seg21 seg22 seg23 seg24 seg25 seg26 seg27 seg28 seg29 seg30 seg31 co aif ai4 ai3 ai2 n.c. = no connection no. pin name 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 v ssa ai1 ai0 ci caz bf ri ch cl gnd v dda aout0 aip0 aim0 aip1 aim1 aout1 v r1 v r2 v ra v d1 k10 k03 k02 k01 no. pin name qfp15-100pin
4 E0C6274 n pin description v dd v ss v dda v ssa gnd v d1 v c1 v c2 v c3 v ca ca?c osc1 osc2 osc3 osc4 k00?10 p00?13 p20?23 r00?03 com0? seg0?1 ai0?i4 aif caz ci ri bf co ch cl v r1 v r2 v ra aip0 aim0 aout0 aip1 aim1 aout1 reset test pin name (i) (i) (i) (i) (i/o) i o i o i i/o i/o o o o i (i) (i) i i o i i o i i in/out power source (+) terminal power source (-) terminal analog system power source (+) terminal analog system power source (-) terminal analog system ground terminal oscillation and internal logic system regulated voltage output terminal lcd system regulated voltage output terminal lcd system booster output terminal (v c1 x 2) lcd system booster output terminal (v c1 x 3) lcd system voltage adjustment terminal booster capacitor connecting terminal crystal oscillation input terminal crystal oscillation output terminal ceramic or cr oscillation input terminal (selected by mask option) ceramic or cr oscillation output terminal (selected by mask option) input terminal i/o terminal i/o terminal or serial input/output terminal output terminal (dc, buzzer or clock output may be selected by mask option) lcd common output terminal lcd segment output terminal (convertible to dc output by mask option) analog input terminal analog input filter condenser connecting terminal auto zero adjustment condenser connecting terminal integral condenser connecting terminal integral resistance connecting terminal buffer amplifier output terminal testing output terminal reference voltage control condenser connecting terminal reference voltage control condenser connecting terminal reference voltage for resistance measurement reference voltage for voltage measurement reference voltage adjustment terminal amp 0 non-inverted input terminal amp 0 inverted input terminal amp 0 output terminal amp 1 non-inverted input terminal amp 1 inverted input terminal amp 1 output terminal initial reset input terminal test input terminal qfp5-100pin 11 6 88 78 87 98 35 34 33 36 32?0 7 8 9 10 3?, 100, 99 16?3 24?7 15?2 40?7 41?2 80, 79, 77?5 74 82 81 84 83 73 85 86 95 96 97 90 91 89 92 93 94 28 29 qfp15-100pin 9 4 86 76 85 96 33 32 31 34 30?8 5 6 7 8 1, 100?7 14?1 22?5 13?0 38?5 39?0 78, 77, 75?3 72 80 79 82 81 71 83 84 93 94 95 88 89 87 90 91 92 26 27 pin no. function n electrical characteristics l absolute maximum ratings rating supply voltage input voltage (1) input voltage (2) permissible total output current * 1 operating temperature (1) operating temperature (2) * 2 storage temperature soldering temperature / time permissible dissipation * 3 * 1: * 2: * 3: the permissible total output current is the sum total of the current (average current) that simultaneously flows from the outpu t pins (or is draw in). the a/d converter and amp circuit are on status. in case of plastic package (qfp5-100pin, qfp15-100pin). symbol v dd v i v iosc s i vdd topr 1 topr 2 tstg tsol p d value -0.5 to 7.0 -0.5 to v dd + 0.3 -0.5 to v d1 + 0.3 10 -20 to 70 0 to 50 -65 to 150 260 c, 10sec (lead section) 250 unit v v v ma c c c mw (v ss =0v) l recommended operating conditions condition supply voltage oscillation frequency (1) oscillation frequency (2) symbol v dd f osc1 f osc3 remark v ss =0v v ss =0v, when a/d converter or amp is used duty 50 5% unit v v khz khz max. 5.5 5.5 1,300 typ. 3.0 3.0 32.768 1,000 min. 2.2 2.4 50
5 E0C6274 l dc characteristics unit v v v v a a a ma ma ma ma a a a a ma ma (unless otherwise specified: v dd =3.0v, v ss =0v, f osc1 =32.768khz, ta=25 c, v d1 /v c1 ? c3 are internal voltage , c1?6=0.1 f) max. v dd v dd 0.2? d 0.1? dd 0.5 -5 0 -0.9 -1.8 -3 -3 -0.2 typ. -10 min. 0.8? dd 0.9? dd 0 0 0 -20 -0.5 3.0 6.0 3 3 0.2 characteristic high level input voltage (1) high level input voltage (2) low level input voltage (1) low level input voltage (2) high level input current low level input current (1) low level input current (2) high level output current (1) high level output current (2) low level output current (1) low level output current (2) common output current segment output current (during lcd output) segment output current (during dc output) symbol v ih1 v ih2 v il1 v il2 i ih i il1 i il2 i oh1 i oh2 i ol1 i ol2 i oh3 i ol3 i oh4 i ol4 i oh5 i ol5 v ih =3.0v v il1 =v ss with pull up resistor v il2 =v ss no pull up resistor v oh1 =0.9? dd v oh2 =0.9? dd v ol1 =0.1? dd v ol2 =0.1? dd v oh3 =v c3 -0.05v v ol3 =0.05v v oh4 =v c3 -0.05v v ol4 =0.05v v oh5 =0.9? dd v ol5 =0.1? dd condition k00?03, k10, sin, sclk p00?03, p10?13, p20?23 reset, test k00?03, k10, sin, sclk p00?03, p10?13, p20?23 reset, test k00?03, k10, sin, sclk p00?03, p10?13, p20?23 reset, test k00?03, k10, sin, sclk p00?03, p10?13, p20?23 reset k00?03, k10, sin, sclk p00?03, p10?13, p20?23 r00, r01, p00?03, p10?13 p20?23, sout, sclk, srdy r02, r03 r00, r01, p00?03, p10?13 p20?23, sout, sclk, srdy r02, r03 com0?om3 seg0?eg31 seg0?eg31 l analog circuit characteristics and current consumption * 1: * 2: * 3: * 4: the svd, a/d converter and amp circuits are off status. the a/d converter (reference voltage v r1 and middle electric potential gnd are supplied from outside) is on status. the svd and amp circuits are off status. the a/d converter (reference voltage v r1 and middle electric potential gnd are supplied from outside) and amp circuits (2 systems) are on status. the svd circuit is off status. the svd circuit is on status. the a/d converter and amp circuits are off status. unit v v v v v v v s a a a a a a a (unless otherwise specified: v dd =v dda =3.0v, v ss =v ssa =0v, f osc1 =32.768khz, ta=25 c, c g =25pf, v d1 /v c1 ? c3 are internal voltage, c1?6=0.1 f) max. 1.15 2? c1 +0.1 3? c1 +0.1 2.7 2.6 2.5 2.4 100 2.0 7.0 15.0 500 915 1515 45.0 typ. 1.05 2.6 2.5 2.4 2.3 0.7 2.0 6.0 200 306 506 16.0 min. 0.95 2? c1 0.9 3? c1 0.9 2.5 2.4 2.3 2.2 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v c1 v c2 v c3 v svd t svd i op condition v ca =v c1 , i c1 =-5 a connect 1m w load resistor between v ss and v c2 (without panel load) connect 1m w load resistor between v ss and v c3 (without panel load) svds="0" svds="1" svds="2" svds="3" during sleep during halt (32khz) during execution (32khz) * 1 during execution (1mhz) * 1 during execution (32khz) * 2 during execution (32khz) * 3 during execution (32khz) * 4 current that flows in external parts (loads) such as the lcd panel is not included.
6 E0C6274 a/d converter * in case of the voltage measurement mode or differential voltage measurement mode, the reference voltage v r2 is adjusted so that the measurement error (absolute error e) of the a/d converter becomes minimum when ta=25 c, v dd =v dda =3a, input voltage v in =+320mv. error and deviation by the reference voltage v r2 are not included. unit count count count count count count count count count count a (unless otherwise specified: v dd =v dda =3.0v, v ss =v ssa =0v, f osc1 =32.768khz, ta=25 c, c g =25pf, v d1 /v c1 ? c3 are internal voltage, c1?6=0.1 f) max. 13 7 4 4 16 8 5 5 20 10 5 5 4 2 2 2 5 3 3 3 11 6 4 4 13 7 5 5 8 4 3 3 10 5 3 3 10 5 3 3 900 typ. 3 2 1 1 4 2 1 1 9 4 2 2 0 0 0 0 1 0 0 0 4 2 1 1 4 2 1 1 1 1 1 1 2 1 1 1 2 1 1 1 300 min. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 characteristic absolute error zero point error polarity error linearity error power current consumption symbol e v1 e v2 e v3 e v4 e d1 e d2 e d3 e d4 e r1 e r2 e r3 e r4 e zv1 e zv2 e zv3 e zv4 e zd1 e zd2 e zd3 e zd4 e pv1 e pv2 e pv3 e pv4 e pd1 e pd2 e pd3 e pd4 e lv1 e lv2 e lv3 e lv4 e ld1 e ld2 e ld3 e ld4 e lr1 e lr2 e lr3 e lr4 i ad condition voltage measurement mode differential voltage measurement mode resistance measurement mode voltage measurement mode differential voltage measurement mode voltage measurement mode differential voltage measurement mode voltage measurement mode differential voltage measurement mode resistance measurement mode ta = 25 c current that flows in external parts is not included. 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w 6400 counts, r i = 680 k w 3200 counts, r i = 330 k w 1600 counts, r i = 180 k w 800 counts, r i = 82 k w
7 E0C6274 [reference curves] (? e = measured value - ideal value absolute error e e e ideal value count (+) (? (? (+) input measured value (? e z = e z zero point error e z count (+) (? (? (+) input * value counted when 0 mv is input there is no standard in the resistance measurement mode because 0 mv input has been inhibited. e p = a - a' (ep contains ez) polarity error e p abc -c -b -a c' b' a' a b c = b - b' = c - c' count (+) (? (? (+) input * there is no standard in the resistance measurement mode because it is - ( minus ) input onl y . count (+) (? (? (+) e l e l +320mv input -320mv e l = measured value - value on the straight line linearity error e l * measured value the straight line linked two count values when input was +320 mv and 0 mv. the straight line linked two count values when input was -320 mv and 0 mv. in the resistance measurement mode, the straight line linked two points at -6400 counts and 0 count.
8 E0C6274 reference voltage generation circuit * error, deviation and power current consumption by external parts are not included. unit mv % mv a ppm/ c %fs a (unless otherwise specified: v dd =v dda =3.0v, v ss =v ssa =0v, f osc1 =32.768khz, ta=25 c, c g =25pf, v d1 /v c1 ? c3 are internal voltage, c1?6=0.1 f) max. 1.0 1.0 600 600 0.30 0.15 30.0 5.0 typ. -475 (-163.8 mv ) -475 150 150 0 0 10.0 2.0 min. -1.0 0 -300 -300 -0.30 -0.15 characteristic output voltage (1) output voltage (2) input voltage input current temperature characteristics supply voltage characteristics power current consumption symbol v r1o v r2o v r1i ? i vr1 ? v r2 /ta v r2 /v dda i ad1 i ad2 condition gnd reference, internal adjustment mode vron = vraon = "1" gnd reference, internal adjustment mode vron = vraon = "1" gnd reference, external adjustment mode vron = vraon = "0", (input voltage when the measurement error becomes minimum) external adjustment mode a/d related are all off. vron = vraon = "0" current that flows in external parts is not included. ta = 0 to 50 c (25 c standard) vron = "1" v dda = 2.4 to 5.5 v vron = "1" internal adjustment mode vron = vraon = "1" external adjustment mode vron = "1", vraon = "0" internal adjustment mode vraon = "1" external adjustment mode vraon = "0" internal adjustment mode vraon = "1" external adjustment mode vraon = "0" middle electric potential (gnd) generation circuit * gndon is mark of gndon1 or gndon0. unit v v a a a a a ppm/ c mv/v a (unless otherwise specified: v dd =v dda =3.0v, v ss =v ssa =0v, f osc1 =32.768khz, ta=25 c, c g =25pf, v d1 /v c1 ? c3 are internal voltage, c1?6=0.1 f) max. v dda /2 +0.05 v dda /2 +0.05 1.0 -100 30 10.0 500 1000 2000 typ. v dda /2 v dda /2 0.5 125 250 500 min. v dda /2 -0.05 v dda /2 -0.05 0 10.0 20.0 40.0 -30 characteristic output voltage input voltage input current high level output current low level output current (1) low level output current (2) low level output current (3) temperature characteristics supply voltage characteristics power current consumption symbol gnd o gnd i ? i gnd ? i oh i ol1 i ol2 i ol3 gnd/t a gnd/v dda i gnd1 i gnd2 i gnd3 condition gndon = "01, 10, 11" gndon = "00" gndon = "00", a/d related are all off. current that flows in external parts is not included. gndon = "01, 10, 11" v oh = gnd - 10 mv gndon = "01" v ol1 = gnd + 10 mv gndon = "10" v ol2 = gnd + 10 mv gndon = "11" v ol3 = gnd + 10 mv ta = 0 to 50 c (25 c standard) gndon = "01, 10, 11" v dda = 2.4 to 5.5 v gndon = "01, 10, 11" gndon = "01" gndon = "10" gndon = "11"
9 E0C6274 general-purpose operational amplifier * amponx indicates ampon0 or ampon1. unit v v a a mv v mv/ s ms a (unless otherwise specified: v dd =v dda =3.0v, v ss =v ssa =0v, f osc1 =32.768khz, ta=25 c, c g =25pf, v d1 /v c1 ? c3 are internal voltage, c1?6=0.1 f) max. v dda 0.1? dda -20 10 v dda -0.7 -20 3 300 300 typ. 200 -200 100 100 min. 0.9? dda v ssa 100 -10 v ssa +0.7 20 characteristic high level output voltage low level output voltage high level output current low level output current offset voltage input voltage range slew rate response time power current consumption symbol v oha v ola i oha i ola v of v ia sr t amp i amp1 i amp2 condition amponx = "1", v aim = gnd v aip = gnd + 10 mv, i oha = -10 a amponx = "1", v aim = gnd v aip = gnd - 10 mv, i ola = 10 a amponx = "1", v aip = gnd, aip = aout v oha = gnd - 0.1 v amponx = "1", v aip = gnd, aim = aout v ola = gnd + 0.1 v amponx = "1", v aip = gnd, aim = aout amponx = "1", v aim = v ia v aip = v ia 15 mv comparator operation amponx = "1" load = 10 pf amponx = "1", v aim = gnd v aip = gnd 15 mv comparator operation ampon0 = "1", ampon1 = "0" ampon0 = "0", ampon1 = "1" rising falling [diagram for explanation of general-purpose operational amplifier] i oha , i ola and v of measurement circuits + v aip (=gnd) v oa (=v of ) v r2 [mv] 50 25 0 ta [?c] v r2 [mv] 5.5 v dda [v] 2.4 max. typ. min. max. min. 4.0 [diagram for explanation of reference voltage generation circuit] ? temperature characteristic v r2 /ta ? supply voltage characteristic v r2 /v dda * ta = 25 c as the standard
10 E0C6274 cc cb ca v dd v dda test v ss v ssa v ca v c1 v c2 v c3 osc1 osc2 v d1 osc3 osc4 reset r02(bz) c1 c2 c3 c4 c5 c gx c6 c dc c7 c p1 +3 v + r a2 r a1 x'tal cr c gc * 1 * 2 r cr k00 | k03 k10 p00 | p03 p10 | p13 p20 (sin) p21 (sout) p22 (sclk) p23 (srdy) aip0 aim0 aout0 aip1 aim1 aout1 r00 (fout) r01 (ptovf) r03 (bz) seg0 | seg31 com0 | com3 co ch cl ri bf caz ci ai0 ai1 ai2 ai3 ai4 aif v ra v r1 v r2 gnd c p2 + c if c8 c i c az r i c9 th E0C6274 lcd panel * 1: ceramic oscillation * 2: cr oscillation r ref x'tal c gx cr c gc c dc r cr r a1 r a2 r vr th r ref r i c i c az c if c1~c9 c p1 , c p2 crystal oscillator trimmer capacitor ceramic oscillator gate capacitance drain capacitance resistance for cr oscillation resistance for lcd drive voltage adjustment resistance for lcd drive voltage adjustment resistance for a/d reference voltage adjustment thermistor reference resistance for resistance measurement integral resistance (resolution) integral capacitor capacitor for auto zero adjustment analog input filter capacitor 32.768khz ci(max.)=35k w 5~25pf 1mhz 100pf 100pf 39k w (f osc3 ? 900khz) 1m w (v c1 ? 1.5v) 2m w (v c1 ? 1.5v) 3m w 10k w (5k w ~20k w ) 10k w 680k w (6400) 330k w (3200) 180k w (1600) 82k w (800) 0.1 f 0.1 f 0.01 f 0.1 f 3.3 f l oscillation characteristics the oscillation characteristics change depending on the conditions (components used, board pattern, etc.). use the follow- ing characteristics as reference values. osc1 crystal oscillation circuit unit v v pf ppm ppm ppm v m w (unless otherwise specified: v dd =3.0v, v ss =0v, crystal: c-002r (c i =35k w ), c g =25pf, c d =built-in, ta=25 c) max. 5 10 7.0 typ. 20 45 min. 2.2 2.2 -10 35 200 characteristic oscillation start voltage oscillation stop voltage built-in capacitance (drain) frequency/voltage deviation frequency/ic deviation frequency adjustment range harmonic oscillation start voltage permitted leak resistance symbol vsta vstp c d ? f/ ? v ? f/ ? ic ? f/ ? c g v hho r leak condition t sta 3sec t stp 10sec including the parasitic capacity inside the ic v dd =2.2 to 5.5v c g =5 to 25pf c g =5pf between osc1 and v dd , v ss (v dd ) (v dd ) (v dd ) osc3 cr oscillation circuit unit % v ms v (unless otherwise specified: v dd =3.0v, v ss =0v, r cr =39k w , ta=25 c) max. 30 3 typ. (900khz) min. -30 2.2 2.2 characteristic oscillation frequency dispersion oscillation start voltage oscillation start time oscillation stop voltage symbol f osc3 vsta t sta vstp condition v dd =2.2 to 5.5v (v dd ) (v dd ) osc3 ceramic oscillation circuit unit v ms v (unless otherwise specified: v dd =3.0v, v ss =0v, ceramic oscillation: 1mhz, c gc =c dc =100pf, ta=25 c) max. 3 typ. min. 2.2 2.2 characteristic oscillation start voltage oscillation start time oscillation stop voltage symbol vsta t sta vstp condition v dd =2.2 to 5.5v (v dd ) (v dd ) n basic external connection diagram note: the above table is simply an example, and is not guaran- teed to work.
11 E0C6274 n package dimensions plastic qfp5-100pin plastic qfp15-100pin unit: mm 20 ?.1 25.6 ?.4 51 80 14 ?.1 19.6 ?.4 31 50 index 0.3 ?.1 30 1 100 81 2.7 ?.1 0.26 3.4 max 2.8 1.5 0 12 0.15 ?.05 0.65 14 ?.1 16 ?.4 51 75 14 ?.1 16 ?.4 26 50 index 0.18 25 1 100 76 1.4 ?.1 0.1 1.7 max 1 0.5 ?.2 0 10 0.125 0.5 +0.1 ?.05 +0.05 ?.025
E0C6274 notice: no part of this material may be reproduced or duplicated in any form or by any means without the written permission of seiko ep son. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is n o representation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to an y intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accord ance with this material will be free from any patent or copyright infringement of a third party. this material or portions thereof may contain technology or the subject relating to strategic products under the control of the foreign exchange and foreign trade control law of japan and may require an export license from the ministry of international trade and industry or other approval from another government agency. ? seiko epson corporation 1999 all right reserved. seiko epson corporation electronic devices marketing division ic marketing & engineering group ed international marketing department i (europe & u.s.a.) 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5812 fax : 042-587-5564 ed international marketing department ii (asia) 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5814 fax : 042-587-5110

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